This invention relates, in general, to photolithography, and more particularly, but not limited to, a method and a system for alignment.
Photolithography is used in the semiconductor chip manufacturing industry. The process for overlaying critical features from one mask layer to another is called alignment. Alignment systems actively use fiducial information on a current mask layer and on the semiconductor substrate of a previous mask layer to relate the spatial orientation of the two layers prior to transfer of the pattern on the mask layer to the substrate.
Alignment systems typically use of one to three mask targets or alignment marks, one to three semiconductor substrate targets, an optics system to collect and perhaps perform some optical processing of scattered light off the mask and wafer targets, and a software package that recognizes the alignment signal generated from the targets. The mask target and the semiconductor substrate target must be aligned to each other.
The alignment signal is generated by illuminating a target comprised of the mask and wafer targets with a light source. Light incident on the target is scattered. Depending upon the alignment system design, some or all of the scattered light is collected by an optics system. The collected light comprises the alignment signal. The signal must be processed to determine positional information of the targets.
The software package uses an algorithm to transform the alignment signal into positional information. Small adjustments are made mechanically by the alignment system in response to the software alignment error analysis to improve the positioning of the mask target relative to the substrate target. Pattern exposure begins after alignment is completed.
All current signal processing algorithms either assume the alignment signal is symmetric or attempt to extract out the symmetric portion of the signal for processing. Signal asymmetries are not accounted for in any quantitative fashion. Unfortunately, signal asymmetries are of paramount importance since they are responsible for offset errors. Because current signal processing algorithms don't account for signal asymmetries, these offset errors can appear as a random contribution enlarging alignment error. Signal asymmetries can be introduced by asymmetric aberrations in the optics, target asymmetry such as a profile difference from one side of the target to the other, an asymmetric defect in the target, an asymmetric film deposition (e.g., spun cast resist) that causes film thickness variations in the neighborhood of the target and so introduces variation in light absorption and scattered light off the target, among other things.
Prior art methods of alignment which attempt to minimize the effect of asymmetric signals include optical techniques using phase gratings to collect light at particular diffraction angles, and software methods applied to signals collected from scattered light.
The optical technique collects light over a finite aperture to minimize the effect of target or optical asymmetries, but this does not eliminate the effect. Software methods of signal processing for symmetrical analysis include, for example, taking the derivative of a time varying signal and finding the zero crossing point, using maximum likelihood statistical methods to find the symmetric center or threshold methods where slices are taken at particular signal intensity levels to find the symmetric center. These software methods process each signal individually; the analysis of the signal is then discarded.
These prior art signal processing methods will introduce alignment offsets or overlay errors if there are any signal asymmetries. The primary emphasis of these techniques is to attempt to create ideal targets and processing conditions which do not introduce asymmetries. While this is an admirable goal, it is difficult and costly to pursue this ideal in a manufacturing environment.
Thus, it would be desirable to eliminate the effect of asymmetric signals in the alignment process. Especially as feature sizes of semiconductor chips continue to shrink and the relative impact of signal asymmetries increases.